APID Academic Profile Identity
Puneet Dubey

Mr. Puneet Dubey

Senior Engineer · Multimedia
Author
APID
12792
ORCID
0009-0004-1923-9377
Location
California, San Diego, United States
Expertise
Semiconductor, VLSI
Areas of interest
RTL Design, Design Verification, DDR, Low Power Verification, UPF, DDR, RAM, USB, PCIe, AXI, UVM, System Verilog, Verilog, Semicondutor, VLSI, Microelectronics
Member since
May 2026

Biography

I am a Senior Staff Engineer in Design Verification at Qualcomm Technologies, specializing in Camera Image Signal Processor (ISP) pipelines for both mobile and automotive applications. Over the course of my career, I have led end-to-end verification of complex SoC subsystems, developed novel testbench architectures, and pioneered AI-driven regression optimization techniques achieving significant efficiency improvements at high coverage levels. My contributions span Qualcomm's Snapdragon mobile platforms — powering flagship devices rated #1 in camera quality — as well as automotive ADAS platforms deployed in vehicles across 60+ countries. I bring deep technical expertise in functional verification, coverage methodology, and cross-domain system validation.

Sign in to see editorial board appointments, follow, and connect.