- APID
- 9235
- ORCID
- 0000-0003-4569-0431
- Scopus
- 59126124700
- Location
- Sehore, Madhya Pradesh, India
- Expertise
- VLSI
- Areas of interest
- Low Power Digital Design, MEMS modelling
- Member since
- January 2025
Biography
Dr. M Suresh has completed his PhD in Digital Design from SUIIT, India in 2021. He holds a Master’s in Engineering (ME) from Jadavpur University and Bachelor’s in Engineering (BE) from Andhra University in ECE. With over 26 years in academic and research, he has made significant contributions. Dr. Suresh has a strong publication record with numerous papers published in repute journals and conferences. He also played pivotal role in developing employment-oriented courses, such as VLSI design engineering and FPGA design. In addition, he has mentored several undergraduate and post graduate projects nurturing the next generation of engineers and researchers.
He is a active member of professional organizations, including being life member of Indian Society for Technical Education (ISTE), the Institution of Electronics and Telecommunication Engineers (IETE), and a member of Institute of Electrical and Electronics Engineers (IEEE).
His primary Research interests encompass Digital design, FPGA design, and Microprocessor based system design reflecting his dedication to advancing the filed and sharing his expertise with others.
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- Computational Analysis and Performance Optimization of Square Membrane Piezoresistive MEMS Pressure Sensor
- Effect of Temperature, Doping and Gate Material Engineering on Tri-Gate SOI nFinFET Performance Through TCAD Simulation
- Ge-Channel Nanosheet FinFETs for Nanoscale Mixed Signal Application
- IoT-Based Smart Security and Home Automation System
- Low power aware standard cells using dual rail multi threshold null convention logic methodology
- Simplistic approach to reduce thermal issues in 3D IC integration technology